34 Commits
Author SHA1 Message Date
glm94 454ce519a5 Updated the figure showing the layout of an instruction. 2025-03-10 00:49:51 -05:00
glm94 4f155090f3 Updated the opcode tables. 2025-02-28 00:54:05 -06:00
Garritt McCune 043311b2e0 Added a section about the Option byte. 2025-02-27 16:37:22 -06:00
glm94 dac37cb167 Added a bit more to the instruction listing start in section 2.2. Need to update the text to talk about offsets in the options byte. 2025-02-26 01:52:46 -06:00
Garritt McCune 1d063f7bba Refactored the section about the ISA. 2025-02-25 16:35:46 -06:00
Garritt McCune 9393a84f96 Cleaned up the code a bit and updated Figure 2.1 to show the physical layout of an instruction. Added some text in Section 2.1. 2025-02-24 16:34:19 -06:00
Garritt McCune 57a469c153 Added commands to build op code tables for instructions with one or no parameters. 2025-02-24 09:39:34 -06:00
glm94 3680d24d68 Removed invalid Option nibble codes and refactored most of the instructions' section code to use the new command. 2025-02-24 02:01:41 -06:00
glm94 02b3c9185d Updated the way I build the opcode table to be a little less repetitive. Now instead of making it an environment it is now a command that will build the arguments based on the 'Options' bit hexcode. 2025-02-24 01:14:30 -06:00
Garritt McCune 5068c6c293 Added a new environment for creating the opcode tables. hoping this will simplify the setup and make things easier to maintain. 2025-02-20 13:50:59 -06:00
Garritt McCune e8d1501d75 Updated the text that introduces the ISA. 2025-02-18 16:13:40 -06:00
glm94 f85a74bd83 Updated chapter 1 to be more fleshed out. 2025-02-02 00:15:44 -06:00
glm94 05adb3d0c9 Added a few more instructions. 2024-09-10 23:29:43 -05:00
glm94 892e34af93 Fleshed out and updated all the current instructions' opcodes, arguments and functions. 2024-09-03 23:21:14 -05:00
Garritt McCune b14779c612 Updated some of the tables to reflect the new encoding scheme. Cleared out some of the old defines and the MOV table so the code can compile. Will fix up the rest of the instructions in a future commit. 2024-09-03 16:36:16 -05:00
glm94 abbe9828e9 Updated the way the encoding for the 'mode' byte works. 2024-09-01 14:51:25 -05:00
Garritt McCune cc4a220aed Started to work on how the MOV instruction will work / what modes it will support. 2024-08-22 16:37:55 -05:00
Garritt McCune efb8bf8883 Further refined some details about how ADD will work which will impact the way the rest of the processor will behave. 2024-08-22 14:23:04 -05:00
Garritt McCune c72b77ca19 Started to flesh out the opcodes but am having issues with Tex packaging trying to get the xint package for hopefully converting bit patterns to a hex code. 2024-08-21 15:38:42 -05:00
Garritt McCune c8ff04050e Updated the look of references 2024-08-20 16:34:35 -05:00
glm94 e2e78a88fd Started the section on the supported interrupts just to get a few thoughts down. 2024-08-19 19:21:49 -05:00
Garritt McCune 47f2f633c5 Updated the encoding figure to show the layout of the instructions, also decided that the mode byte will not be required for instructions with no arguments, but need to update the text to reflect this still. 2024-08-09 15:09:43 -05:00
Garritt McCune 8c0de609b5 Updated the description about the ISA's encoding scheme since it is no longer fixed width. 2024-08-08 15:44:15 -05:00
Garritt McCune 3f78a00be8 Updated the way the mode setting works by allocating an entire byte for it. 2024-08-07 16:52:28 -05:00
glm94 b31c1fbe76 Started on a new figure to explain a new instruction layout, no more fixed length encoding, basically. 2024-08-01 23:22:35 -05:00
Garritt McCune 5cd831aeb9 Added some more instructions to help flesh out the ISA section. 2024-07-31 15:33:25 -05:00
Garritt McCune 04a06fc2ff Tweaked the figures a bit more. 2024-07-24 16:27:52 -05:00
Garritt McCune 1b9910e908 Started to mess around with setting up the figure for the layout of the registers and main memory. 2024-07-22 16:09:00 -05:00
Garritt McCune b1e3e585f4 Minor tweaks and added a note or two. 2024-07-19 16:26:21 -05:00
Garritt McCune 8003d389e9 Updated the encoding layout figures. 2024-07-19 15:54:34 -05:00
Garritt McCune df15bb60e7 Updated the Encoding Scheme section adding a 'operand mode' setting to the encoding as well changing the placement of the figures in that section. 2024-07-19 13:50:44 -05:00
glm94 5c646a4835 First opcode table setup. 2024-07-19 00:53:29 -05:00
glm94 b6b340fd62 Updated the figure for instruction encoding, mostly just example code for more proper figures. 2024-07-18 00:24:44 -05:00
glm94 51c79d74aa Added the start of a second chapter for the ISA itself. 2024-07-15 23:57:27 -05:00