 glm94
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b31c1fbe76
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Started on a new figure to explain a new instruction layout, no more fixed length encoding, basically.
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2024-08-01 23:22:35 -05:00 |
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glm94
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5c646a4835
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First opcode table setup.
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2024-07-19 00:53:29 -05:00 |
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glm94
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b6b340fd62
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Updated the figure for instruction encoding, mostly just example code for more proper figures.
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2024-07-18 00:24:44 -05:00 |
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glm94
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51c79d74aa
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Added the start of a second chapter for the ISA itself.
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2024-07-15 23:57:27 -05:00 |
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glm94
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70849bb698
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Added a little more about the registers and tweaked the code for the register bit layout figure.
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2024-06-16 01:38:41 -05:00 |
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glm94
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dcdf266cdd
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Initial commit and setup.
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2024-05-09 20:31:43 -05:00 |
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