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14 Commits 1 Branch 0 Tags
3f78a00be840f660132b81b22c943d725f4f868e
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Author SHA1 Message Date
Garritt McCune 3f78a00be8 Updated the way the mode setting works by allocating an entire byte for it. 2024-08-07 16:52:28 -05:00
Garritt McCune 5cd831aeb9 Added some more instructions to help flesh out the ISA section. 2024-07-31 15:33:25 -05:00
Garritt McCune 04a06fc2ff Tweaked the figures a bit more. 2024-07-24 16:27:52 -05:00
Garritt McCune 4acb5a7625 Updated the register and memory layout figure. 2024-07-23 14:52:56 -05:00
Garritt McCune 1b9910e908 Started to mess around with setting up the figure for the layout of the registers and main memory. 2024-07-22 16:09:00 -05:00
Garritt McCune b1e3e585f4 Minor tweaks and added a note or two. 2024-07-19 16:26:21 -05:00
Garritt McCune 8003d389e9 Updated the encoding layout figures. 2024-07-19 15:54:34 -05:00
Garritt McCune df15bb60e7 Updated the Encoding Scheme section adding a 'operand mode' setting to the encoding as well changing the placement of the figures in that section. 2024-07-19 13:50:44 -05:00
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