17 Commits
Author SHA1 Message Date
glm94 454ce519a5 Updated the figure showing the layout of an instruction. 2025-03-10 00:49:51 -05:00
Garritt McCune 1d063f7bba Refactored the section about the ISA. 2025-02-25 16:35:46 -06:00
Garritt McCune 53962331d5 Updated the text around Memory and added a section for the firmware / initialization. 2025-02-07 16:08:41 -06:00
Garritt McCune 883c48270f Started brainstorming the memory map. 2025-02-06 16:13:29 -06:00
glm94 43b8dd0119 Added a conventions and data types section. 2025-02-05 00:42:15 -06:00
Garritt McCune 7baadf96fa Added a section to the memory map for the video memory. 2025-02-04 16:23:50 -06:00
Garritt McCune eba9778993 Created a basic setup for the figure for the memory layout / map. 2025-02-04 15:17:13 -06:00
glm94 472b9f839f Added a bit about the flags register 2025-02-03 23:48:30 -06:00
glm94 d3ccd6678c Added some information about the memory layout and a figure for the bit ordering in the registers. 2025-02-03 23:12:00 -06:00
glm94 f85a74bd83 Updated chapter 1 to be more fleshed out. 2025-02-02 00:15:44 -06:00
Garritt McCune c8ff04050e Updated the look of references 2024-08-20 16:34:35 -05:00
Garritt McCune 04a06fc2ff Tweaked the figures a bit more. 2024-07-24 16:27:52 -05:00
Garritt McCune 4acb5a7625 Updated the register and memory layout figure. 2024-07-23 14:52:56 -05:00
Garritt McCune 1b9910e908 Started to mess around with setting up the figure for the layout of the registers and main memory. 2024-07-22 16:09:00 -05:00
glm94 51c79d74aa Added the start of a second chapter for the ISA itself. 2024-07-15 23:57:27 -05:00
glm94 70849bb698 Added a little more about the registers and tweaked the code for the register bit layout figure. 2024-06-16 01:38:41 -05:00
glm94 dcdf266cdd Initial commit and setup. 2024-05-09 20:31:43 -05:00