Solved the 'smaller' gates and probably not with the best solutions.
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@@ -15,4 +15,11 @@ CHIP DMux {
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PARTS:
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// Put your code here:
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// AND in, sel
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Nand(a=in, b=sel, out=out1);
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Nand(a=out1, b=out1, out=b);
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// NAND( (NOT sel), AND in)
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Nand(a=sel, b=sel, out=out2);
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Nand(a=in, b=out2, out=out3);
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Nand(a=out3, b=out3, out=a);
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}
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