From e2e78a88fd1ffc65b44cd39fd860ac1dfe6ad9cb Mon Sep 17 00:00:00 2001 From: Garritt McCune Date: Mon, 19 Aug 2024 19:21:49 -0500 Subject: [PATCH] Started the section on the supported interrupts just to get a few thoughts down. --- chapter 2.tex | 18 ++++++++++-------- chapter 3.tex | 10 ++++++++++ document.tex | 1 + 3 files changed, 21 insertions(+), 8 deletions(-) create mode 100644 chapter 3.tex diff --git a/chapter 2.tex b/chapter 2.tex index 496e891..00636ee 100644 --- a/chapter 2.tex +++ b/chapter 2.tex @@ -28,14 +28,14 @@ Instructions are variable width with their total length being determined by the \begin{tikzpicture} %Opcode Byte \draw (\minX, 0) -- (\lnWidth, 0) node[midway, below=1em] {Opcode}; - \draw (\minX, \minY) -- (\minX, \maxY) node[above] {7}; - \draw (\lnWidth, \minY) -- (\lnWidth, \maxY) node[above] {0}; + \draw (\minX, \minY) node[below] {7} -- (\minX, \maxY); + \draw (\lnWidth, \minY) -- (\lnWidth, \maxY) node[above] {7}; %Mode setting byte - \draw (\lnWidth, 0) -- (\lnWidth * 2, 0) node[midway, below=1em] (ModeByteLabel) {Mode}; - \draw node[below of=ModeByteLabel] {(if required)}; - \draw (\lnWidth, \minY) node[below] {7} -- (\lnWidth, \maxY); + \draw (\lnWidth, 0) -- (\lnWidth * 2, 0) node[midway, above=1em] (ModeSettingByteLabel) {Mode}; + \draw node[above of=ModeSettingByteLabel] {(if required)}; + \draw (\lnWidth, \minY) node[below] {0} -- (\lnWidth, \maxY); \draw (\lnWidth * 2, \minY) node[below] {0} -- (\lnWidth * 2, \maxY); - \draw (\lnWidth + \lnWidth / 2, \minY) -- (\lnWidth + \lnWidth / 2, \maxY) node[above] {4 3}; + \draw (\lnWidth + \lnWidth / 2, \minY) node[below] (ModeByteMiddleLabel) {4 3} -- (\lnWidth + \lnWidth / 2, \maxY); %Operand One \draw (\lnWidth * 2, 0) -- (\lnWidth * 3, 0) node[midway, below=1em] (OperOneLabel) {Operand One}; \draw (\lnWidth * 2, \minY) -- (\lnWidth * 2, \maxY) node[above] {31/15/7}; @@ -125,5 +125,7 @@ The /r represents a byte that specifies a register. /iX is for the immediate dat \OpcodeTable{01}{cli}{None}{None}{Clears the interrupt flag preventing the processor from receiving interrupts.} \subsection{ENI} \OpcodeTable{01}{eni}{None}{None}{Sets the interrupt flag allowing the processor to receive interrupts.} -\subsection{INT} -\OpcodeTable{01 /i8}{int /i8}{Immediate}{None}{Triggers software interrupt number \textit{Operand 1}.} \ No newline at end of file +\subsection{INT}\label{int} +\OpcodeTable{01 /i8}{int /i8}{Immediate}{None}{Triggers software interrupt number \textit{Operand 1}.} +\subsection{LIVT}\label{livt} +\OpcodeTable{00 /mod /i32}{livt /i32}{Immediate}{None}{Installs the Interrupt Vector Table located at memory address \textit{Operand 1}.} \ No newline at end of file diff --git a/chapter 3.tex b/chapter 3.tex new file mode 100644 index 0000000..7cf9684 --- /dev/null +++ b/chapter 3.tex @@ -0,0 +1,10 @@ +\chapter{Interrupts} +Interrupts are signals sent to the processor via the I/O pin, software interrupt (via the \ref{int} instruction) or by the processor detecting a fault (divide by zero for instance). When an interrupt occurs the processor will index the Interrupt Vector Table whose location is provided by the livt \ref{livt} instruction. + +\paragraph{Unknown Opcode} Interrupt 0. Pushes status flags and clears interrupts. + +\paragraph{Divide by Zero} Interrupt 1. Pushes status flags and clears interrupts. + +\paragraph{INT 2-31} Reserved for future use. + +\paragraph{INT 32-255} Open to be used by software services. \ No newline at end of file diff --git a/document.tex b/document.tex index f4dd25c..f8b8baa 100644 --- a/document.tex +++ b/document.tex @@ -17,5 +17,6 @@ \tableofcontents \include{chapter 1} \include{chapter 2} + \include{chapter 3} \end{document} \ No newline at end of file