From d3ccd6678c3a7c9c457d9e7e54b0e807a87a35bb Mon Sep 17 00:00:00 2001 From: Garritt McCune Date: Mon, 3 Feb 2025 23:12:00 -0600 Subject: [PATCH] Added some information about the memory layout and a figure for the bit ordering in the registers. --- chapter 1.tex | 42 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/chapter 1.tex b/chapter 1.tex index fff31ec..d06143b 100644 --- a/chapter 1.tex +++ b/chapter 1.tex @@ -1,8 +1,45 @@ \chapter{Introduction} -This is an attempt to distill what I know about how computers work into some kind of emulator / simulator. I'm curious to see if what I know at the moment is enough to allow me to emulate a general purpose computer. It turns out that it take quite a different skillset compared to writing web applications or desktop applications. But I realize that, while I understand the concepts that underpin what I do day to day, I don't have an intuitive understanding of the hardware. This has become painfully evident pretty much immediately after I started this project. An ISA should be simple, add, subtract, copy, etc., but the you have to consider the state the processor will be in after each instruction. +This is an attempt to distill what I know about how computers work into some kind of emulator / simulator. I'm curious to see if what I know at the moment is enough to allow me to emulate a general purpose computer. It turns out that it take quite a different skillset compared to writing web applications or desktop applications. But I realize that, while I understand the concepts that underpin what I do day to day, I don't have an intuitive understanding of the hardware. This has become painfully evident pretty much immediately after I started this project. An ISA should be simple, add, subtract, copy, etc., but the you have to consider the state the processor will be in after each instruction. \section{Registers} Thirty-two general purpose registers are available for program code to use however it wishes. The base name for the general purpose registers is \quotes{r} follows by an unpadded number, such as \quotes{r28}. These numbers do not follow a zero-based index scheme, \quotes{r29} is the twenty-ninth register. Using the base name implies full width, a \quotes{word}, when reading or writing from or to the register respectively. In addition to the general purpose registers there is also a base pointer (bp), stack pointer (sp) and an instruction pointer (ip). The base pointer and the stack pointer may be set directly using the \hyperref[sec:mov]{mov} instruction, which allows the programmer to set up a stack frame. The instruction pointer can only be set with a branching operation like \hyperref[sec:jmp]{jmp} or a call to a subroutine with the \hyperref[sec:call]{call} instruction. +\begin{figure}[h] + \begin{tikzpicture} + %\draw[help lines] (-8,-3) grid (8,3); + \node [draw, fit={(-6, 0) (-1, -0.5)}, label=center:r1] (r1) {}; + \node [draw=none, fit={(-6, -1) (-1, -1.5)}, label=center:...] (ellipsis) {}; + \node [draw, fit={(-6, -2) (-1, -2.5)}, label=center:r32] (r32) {}; + + \node [draw, fit={(-3.0, 1.5) (2.0, 1.0)}, label=center:Flags Register] (flags) {}; + \node [draw, fit={(0, 0) (5, -0.5)}, label=center:Instruction Pointer (ip)] (ip) {}; + \node [draw, fit={(0, -1.0) (5, -1.5)}, label=center:Base Pointer (ip)] (bp) {}; + \node [draw, fit={(0, -2.0) (5, -2.5)}, label=center:Stack Pointer (ip)] (sp) {}; + + \draw (r1); + \node at (r1.north) [above] {General Purpose}; + \node at (r1.north west) [above] {31}; + \node at (r1.north east) [above] {0}; + + \draw (ellipsis); + \draw (r32); + + \draw (flags); + \node at (flags.north) [above] {Status Register}; + \node at (flags.north west) [above] {31}; + \node at (flags.north east) [above] {0}; + + \draw (ip); + \node at (ip.north) [above] {Program Status}; + \node at (ip.north west) [above] {31}; + \node at (ip.north east) [above] {0}; + + \draw (bp); + \draw (sp); + \end{tikzpicture} + \caption{Bit Ordering} + \label{fig:registerbitlayout} % https://www.overleaf.com/learn/latex/Referencing_Figures +\end{figure} + \begin{description} \item In summary, the available registers are as follows: \item[General Purpose] Thirty-two general purpose registers that are the width of a \textit{word} and numbered \quotes{r1} through \quotes{r32} @@ -11,4 +48,5 @@ Thirty-two general purpose registers are available for program code to use howev \item[Instruction Pointer (ip)] Points to the next instruction to execute and advanced by the width of an instruction. Set by jump or call instructions to the location specified by the instruction. \end{description} -\section{Memory} \ No newline at end of file +\section{Memory} +The memory layout is quite simple, much like many modern machines it is a linear memory map. The address bus is thrity-two bits wide, the same width of the data bus, meaning at most there is 2\textsuperscript{32} of addressable memory. Like contemprary machines the top of memory starts at address 0x00000000 and grows downward toward 0xFFFFFFFF. \ No newline at end of file