Removed invalid Option nibble codes and refactored most of the instructions' section code to use the new command.
This commit is contained in:
+53
-186
@@ -1,16 +1,7 @@
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\ExplSyntaxOn
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% Opcode, Opcode Name, Description, Flags Affected, Options
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% Maybe have an optional argument to relabel the operands Source and Destination
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\NewDocumentCommand{\createoptable}{ m m m m m }{
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%\newcommand{\row}[3] {#1~#3 & #2 & Temp & \cs_if_eq:NNTF {#3} {E} { Allowed} { None } \\ \hline}
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%\clist_new:N \l_options
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%\clist_set:Nn \l_options {#3}
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%\begin{tabularx}{\textwidth}{ | c | }
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% \clist_map_inline:Nn \l_options { ##1 \\ }
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%\end{tabularx}
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%\seq_set_split:Nnn \l_tmpa_seq {,} {#3}
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\clist_clear_new:N \l_options
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\clist_set:Nn \l_options {#3}
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@@ -23,28 +14,26 @@
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\clist_map_inline:Nn \l_options {
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%\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2 & Temp & \cs_if_eq:NNTF {##1} {E} { Allowed} { None } \\ \hline }
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\str_case:nnF{##1} {
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{1} {
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /r1 & r & r1 \\ \hline }
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{0}{
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2~/r,~/r & r & r \\ \hline }
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}{1}{
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2~/r,~[/r] & r & [r] \\ \hline }
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}{2}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /r2 & r & r2 \\ \hline }
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}{3}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /r3 & r & r2 \\ \hline }
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}{4}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /r4 & r & r2 \\ \hline }
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2 [/r],~/r2 & [r] & r \\ \hline }
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}{5}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /r5 & r & r2 \\ \hline }
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2~/r,~[imm] & r & [imm] \\ \hline }
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}{8}{
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2~imm,~/r & imm & r \\ \hline }
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}{9}{
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2 ~imm, [r] & imm & [r] \\ \hline }
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}{A}{
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2~[imm], /r & imm & r \\ \hline }
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}{D}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /rD & r & r2 \\ \hline }
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}{E}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /rE & r & r2 \\ \hline }
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}{F}{
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\tl_put_right:Nn \l_tmpa_seq { #1 & #2 /r, /rF & r & r2 \\ \hline }
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\tl_put_right:Nn \l_tmpa_seq { #1~##1 & #2 ~imm,~[imm] & imm & [imm] \\ \hline }
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}
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}{ FALSE }
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}{ \tl_put_right:Nn \l_tmpa_seq {#1~##1 & INVALID & -- & -- \\ \hline} }
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%\tl_put_right:Ne \l_tmpa_seq { \my_parse #1 #2 #3 }
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}
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\tl_put_right:Nn \l_tmpa_seq { \end{tabularx} }
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@@ -52,16 +41,6 @@
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\tl_put_right:Nn \l_tmpa_seq { \paragraph{Flags Affected} #4 }
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\tl_use:N \l_tmpa_seq
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%\begin{tabularx}{\textwidth}{ | c | X | c | c | } \hline
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%Opcode & Instruction & Operand One & Operand Two \\ \hline
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%\clist_map_inline:Nn \l_options { #1~##1 \parseoption{#2}{##1} \\ \hline } %{ \row{#1}{##1}{#2} }
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%\l_parse_row:nn{#1}{#2}
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%\end{tabularx}
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%\paragraph{Description} #5
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%\paragraph{Flags Affected} #4
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}
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\ExplSyntaxOff
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@@ -154,138 +133,45 @@ In general instructions are variable length depending on the number of arguments
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\section{Instructions}
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The /r represents a byte that specifies a register. /immX is for the immediate data type, where \textit{X} defines the width, which are 8, 16, or 32 bits. An address is defined as /addrX with the \textit{X} denoting the size of the data that will be written which can be 8, 16 or 32 bits, with the address itself always being 32-bits wide.
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\subsection{Add}
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\createoptable{01}{add}{1, 2, 3}{ OF and ZF. }
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\createoptable{01}{add}{0, 8}{ OF and ZF. }
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{
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Adds two unsigned values together, the source (operand one) and the destination (operand two), storing the result in destination. The overflow flag (OF) is set if the result is less than the source and the zero flag (ZF) is set when the result of addition is zero.
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}
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\subsection{Sub}
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\createoptable{02}{sub}{F, E, D}{ UF and ZF. }
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\createoptable{02}{sub}{0, 8}{ UF and ZF. }
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{
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Subtracts two unsigned values, the source (operand one) and the destination (operand two), storing the result in destination. The underflow flag (UF) is set if the result is greater than the source and the zero flag (ZF) is set when the result of subtraction is zero.
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}
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\subsection{Mul}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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03 \rRArgH\byteWidthH & mul byte /r, /r & /r & /r \\
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03 \rRArgH\shortWidthH & mul short /r, /r & /r & /r \\
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03 \rRArgH\intWidthH & mul (int) /r, /r & /r & /r \\
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03 \immRArgH\byteWidthH & mul byte /imm8, /r & /imm8 & /r \\
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03 \immRArgH\shortWidthH & mul short /imm16, /r & /imm16 & /r \\
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03 \immRArgH\intWidthH & mul (int) /imm32, /r & /imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Multiplies two unsigned values together, the source (operand one) and the destination (operand two), storing the result in destination. The overflow flag (OF) is set if the result is less than the source and the zero flag (ZF) is set when the result of addition is zero.
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\paragraph{Flags Affected} OF and ZF.
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\createoptable{03}{mul}{0, 8}{ OF and ZF. }
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{
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Multiplies two unsigned values together, the source (operand one) and the destination (operand two), storing the result in destination. The overflow flag (OF) is set if the result is less than the source and the zero flag (ZF) is set when the result of addition is zero.
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}
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\subsection{Div}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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04 \rRArgH\byteWidthH & div byte /r, /r & /r & /r \\
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04 \rRArgH\shortWidthH & div short /r, /r & /r & /r \\
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04 \rRArgH\intWidthH & div (int) /r, /r & /r & /r \\
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04 \immRArgH\byteWidthH & div byte /imm8, /r & /imm8 & /r \\
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04 \immRArgH\shortWidthH & div short /imm16, /r & /imm16 & /r \\
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04 \immRArgH\intWidthH & div (int) /imm32, /r & /imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Divides two unsigned values, the source (operand one) and the destination (operand two), storing the result in destination. The underflow flag (UF) is set if the result is greater than the source and the zero flag (ZF) is set when the result of subtraction is zero.
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\paragraph{Flags Affected} UF and ZF.
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\createoptable{04}{div}{0, 8}{ UF and ZF. }
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{
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Divides two unsigned values, the source (operand one) and the destination (operand two), storing the result in destination. The underflow flag (UF) is set if the result is greater than the source and the zero flag (ZF) is set when the result of subtraction is zero.
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}
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\subsection{Mov}\label{sec:mov}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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05 \rRArgH\byteWidthH & mov byte /r, /r & /r & /r \\
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05 \rRArgH\shortWidthH & mov short /r, /r & /r & /r \\
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05 \rRArgH\intWidthH & mov (int) /r, /r & /r & /r \\
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05 \rRaArgH\byteWidthH & mov byte /r, [/r] & /r & [/r] \\
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05 \rRaArgH\shortWidthH & mov short /r, [/r] & /r & [/r] \\
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05 \rRaArgH\intWidthH & mov (int) /r, [/r] & /r & [/r] \\
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05 \rAArgH\byteWidthH & mov byte /r, [imm32] & /r & [imm32] \\
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05 \rAArgH\shortWidthH & mov short /r, [imm32] & /r & [imm32] \\
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05 \rAArgH\intWidthH & mov (int) /r, [imm32] & /r & [imm32] \\
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05 \raRArgH\byteWidthH & mov byte [/r], /r & [/r] & /r \\
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05 \raRArgH\shortWidthH & mov short [/r], /r & [/r] & /r \\
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05 \raRArgH\intWidthH & mov (int) [/r], /r & [/r] & /r \\
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05 \raRaArgH\byteWidthH & mov byte [/r], [/r] & [/r] & [/r] \\
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05 \raRaArgH\shortWidthH & mov short [/r], [/r] & [/r] & [/r] \\
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05 \raRaArgH\intWidthH & mov (int) [/r], [/r] & [/r] & [/r] \\
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05 \raAArgH\byteWidthH & mov byte [/r], [imm32] & [/r] & [imm32] \\
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05 \raAArgH\shortWidthH & mov short [/r], [imm32] & [/r] & [imm32] \\
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05 \raAArgH\intWidthH & mov (int) [/r], [imm32] & [/r] & [imm32] \\
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05 \immRArgH\byteWidthH & mov byte imm8, /r & imm8 & /r \\
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05 \immRArgH\shortWidthH & mov short imm16, /r & imm16 & /r \\
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05 \immRArgH\intWidthH & mov (int) imm32, /r & imm32 & /r \\
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05 \immRaArgH\byteWidthH & mov byte imm8, [/r] & imm8 & [/r] \\
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05 \immRaArgH\shortWidthH & mov short imm16, [/r] & imm16 & [/r] \\
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05 \immRaArgH\intWidthH & mov (int) imm32, [/r] & imm32 & [/r] \\
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05 \immAArgH\byteWidthH & mov byte imm8, [imm32] & imm8 & [imm32] \\
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05 \immAArgH\shortWidthH & mov short imm16, [imm32] & imm16 & [imm32] \\
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05 \immAArgH\intWidthH & mov (int) imm32, [imm32] & imm32 & [imm32] \\
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05 \aRArgH\byteWidthH & mov byte [imm32], /r & [imm32] & /r \\
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05 \aRArgH\shortWidthH & mov short [imm32], /r & [imm32] & /r \\
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05 \aRArgH\intWidthH & mov (int) [imm32], /r & [imm32] & /r \\
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05 \aRaArgH\byteWidthH & mov byte [imm32], [/r] & [imm32] & [/r] \\
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05 \aRaArgH\shortWidthH & mov short [imm32], [/r] & [imm32] & [/r] \\
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05 \aRaArgH\intWidthH & mov (int) [imm32], [/r] & [imm32] & [/r] \\
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05 \aAArgH\byteWidthH & mov byte [imm32], [imm32] & [imm32] & [imm32] \\
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05 \aAArgH\shortWidthH & mov short [imm32], [imm32] & [imm32] & [imm32] \\
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05 \aAArgH\intWidthH & mov (int) [imm32], [imm32] & [imm32] & [imm32] \\
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\hline
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\end{tabularx}
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\paragraph{Description} Copies the source (operand one) value to the destination (operand two).
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\paragraph{Flags Affected} None.
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\createoptable{05}{mov}{0, 1, 2, 5, 8, 9, A, D}{ None. }
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{
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Copies the source (operand one) value to the destination (operand two).
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}
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\subsection{AND}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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06 \rRArgH\byteWidthH & and byte /r, /r & /r & /r \\
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06 \rRArgH\shortWidthH & and short /r, /r & /r & /r \\
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06 \rRArgH\intWidthH & and (int) /r, /r & /r & /r \\
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06 \immRArgH\byteWidthH & and byte /imm8, /r & /imm8 & /r \\
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06 \immRArgH\shortWidthH & and short /imm16, /r & /imm16 & /r \\
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06 \immRArgH\intWidthH & and (int) /imm32, /r & /imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Bitwise AND's the source (operand one) with the destination (operand two) storing the result in the destination. If the result of the operation is zero then the Zero Flag (ZF) is set.
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\paragraph{Flags Affected} ZF.
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\createoptable{06}{and}{0, 8}{ ZF. }
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{
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Bitwise AND's the source (operand one) with the destination (operand two) storing the result in the destination. If the result of the operation is zero then the Zero Flag (ZF) is set.
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}
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\subsection{OR}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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07 \rRArgH\byteWidthH & or byte /r, /r & /r & /r \\
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07 \rRArgH\shortWidthH & or short /r, /r & /r & /r \\
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07 \rRArgH\intWidthH & or (int) /r, /r & /r & /r \\
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07 \immRArgH\byteWidthH & or byte /imm8, /r & /imm8 & /r \\
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07 \immRArgH\shortWidthH & or short /imm16, /r & /imm16 & /r \\
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07 \immRArgH\intWidthH & or (int) /imm32, /r & /imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Bitwise OR's the source (operand one) with the destination (operand two) storing the result in the destination. If the result of the operation is zero then the Zero Flag (ZF) is set.
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\paragraph{Flags Affected} ZF.
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\createoptable{07}{or}{0, 8}{ ZF. }
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{
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Bitwise OR's the source (operand one) with the destination (operand two) storing the result in the destination. If the result of the operation is zero then the Zero Flag (ZF) is set.
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}
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\subsection{XOR}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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08 \rRArgH\byteWidthH & xor byte /r, /r & /r & /r \\
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08 \rRArgH\shortWidthH & xor short /r, /r & /r & /r \\
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08 \rRArgH\intWidthH & xor (int) /r, /r & /r & /r \\
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08 \immRArgH\byteWidthH & xor byte /imm8, /r & /imm8 & /r \\
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08 \immRArgH\shortWidthH & xor short /imm16, /r & /imm16 & /r \\
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08 \immRArgH\intWidthH & xor (int) /imm32, /r & /imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Bitwise exclusive OR's (XOR) the source (operand one) with the destination (operand two) storing the result in the destination. If the result of the operation is zero then the Zero Flag (ZF) is set.
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\paragraph{Flags Affected} ZF.
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\createoptable{08}{xor}{0, 8}{ ZF. }
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{
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Bitwise exclusive OR's (XOR) the source (operand one) with the destination (operand two) storing the result in the destination. If the result of the operation is zero then the Zero Flag (ZF) is set.
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}
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\subsection{NOT}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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@@ -297,29 +183,15 @@ The /r represents a byte that specifies a register. /immX is for the immediate d
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\paragraph{Description} Bit-wise NOT's the source (operand one) in place.
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\paragraph{Flags Affected} None.
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\subsection{SHL}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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0A \immRArgH\byteWidthH & shl byte imm8, /r & imm8 & /r \\
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0A \immRArgH\shortWidthH & shl short imm16, /r & imm16 & /r \\
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0A \immRArgH\intWidthH & shl (int) imm32, /r & imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Shifts the destination (operand two) left \textit{operand one} times in place. If the source is smaller than before the operation the overflow flag (OF) is set. If the result of the operation is zero than the zero flag (ZF) is set.
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\paragraph{Flags Affected} OF and ZF.
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\createoptable{0A}{shl}{8}{ OF and ZF. }
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{
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Shifts the destination (operand two) left \textit{operand one} times in place. If the source is smaller than before the operation the overflow flag (OF) is set. If the result of the operation is zero than the zero flag (ZF) is set.
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}
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\subsection{SHR}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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0B \immRArgH\byteWidthH & shr byte imm8, /r & imm8 & /r \\
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0B \immRArgH\shortWidthH & shr short imm16, /r & imm16 & /r \\
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0B \immRArgH\intWidthH & shr (int) imm32, /r & imm32 & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Shifts the destination (operand two) right \textit{operand one} times in place. If the source is larger than before the operation the underflow flag (UF) is set. If the result of the operation is zero than the zero flag (ZF) is set.
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\paragraph{Flags Affected} UF and ZF.
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\createoptable{0B}{shr}{8}{ UF and ZF. }
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{
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Shifts the destination (operand two) right \textit{operand one} times in place. If the source is larger than before the operation the underflow flag (UF) is set. If the result of the operation is zero than the zero flag (ZF) is set.
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}
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\subsection{NOP}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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||||
@@ -331,15 +203,10 @@ The /r represents a byte that specifies a register. /immX is for the immediate d
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\paragraph{Description} Performs no operation except for incrementing the program counter by one.
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\paragraph{Flags Affected} None.
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\subsection{CMP}
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\begin{tabularx}{\textwidth}{ | c | X | c | c | }
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\hline
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Opcode & Instruction & Operand One & Operand Two \\
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\hline
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0D \rRArgH\intWidthH & cmp /r, /r & /r & /r \\
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\hline
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\end{tabularx}
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\paragraph{Description} Compares \textit{operand one} to \textit{operand two} by subtracting \textit{operand one} from \textit{operand two}, updating the status register with the results. If \textit{operand one} is larger than the result, and the result is not zero, the overflow flag (OF) is set. If \textit{operand one} is smaller than the result, and the result is not zero, the underflow flag (UF) is set. And if the result of the subtraction is zero the zero flag (ZF) is set.
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\paragraph{Flags Affected} OF, UF and ZF.
|
||||
\createoptable{0D}{cmp}{0, 8}{ OF, UF and ZF. }
|
||||
{
|
||||
Compares \textit{operand one} to \textit{operand two} by subtracting \textit{operand one} from \textit{operand two}, updating the status register with the results. If \textit{operand one} is larger than the result, and the result is not zero, the overflow flag (OF) is set. If \textit{operand one} is smaller than the result, and the result is not zero, the underflow flag (UF) is set. And if the result of the subtraction is zero the zero flag (ZF) is set.
|
||||
}
|
||||
\subsection{JMP}\label{sec:jmp}
|
||||
\begin{tabularx}{\textwidth}{ | c | X | c | c | }
|
||||
\hline
|
||||
|
||||
Reference in New Issue
Block a user