From 1d063f7bba38a3aa6829008a30006d91ee20c1e4 Mon Sep 17 00:00:00 2001 From: Garritt McCune Date: Tue, 25 Feb 2025 16:35:46 -0600 Subject: [PATCH] Refactored the section about the ISA. --- chapter 1.tex | 1 + chapter 2.tex | 44 +++++++++++++------------------------------- document.tex | 12 +++++------- 3 files changed, 19 insertions(+), 38 deletions(-) diff --git a/chapter 1.tex b/chapter 1.tex index 43fe15e..088ef9e 100644 --- a/chapter 1.tex +++ b/chapter 1.tex @@ -1,6 +1,7 @@ \chapter{Introduction} This is an attempt to distill what I know about how computers work into some kind of emulator / simulator. I'm curious to see if what I know at the moment is enough to allow me too emulate a general purpose computer. It turns out that it take quite a different skill set compared to writing web or desktop applications. But I realize that, while I understand the concepts that underpin what I do day to day, I don't have an intuitive understanding of the hardware. This has become painfully evident pretty much immediately after I started this project. An ISA should be simple, add, subtract, copy, etc., but then you have to consider the state that the processor will be in after each instruction. This \quotes{little} project will be a specification for a sort of System-on-Chip (SoC) where the CPU, GPU and memory are all inter-connected. \section{Conventions \& Data Types} +\label{sec:conventions} This machine is \quotes{little endian} meaning bytes are numbered starting from the least significant byte or the right most byte. Figure \ref{fig:bytelayout} shows how a structure is layed out in memory byte by byte. \begin{figure}[h] \label{fig:bytelayout} % https://www.overleaf.com/learn/latex/Referencing_Figures diff --git a/chapter 2.tex b/chapter 2.tex index 25b0e73..0a06063 100644 --- a/chapter 2.tex +++ b/chapter 2.tex @@ -83,29 +83,33 @@ \ExplSyntaxOff \chapter{Instruction Set Architecture} -In general instructions are variable length depending on the number of arguments and their width. The first byte of an instruction is the \textit{opcode} which tells the machine what operation is to be performed. If one or more arguments are required, then the next byte is the \textit{options} byte which describes the type and width of the argument(s). The exact meaning of all the bits in the \textit{options} byte are shown in Figure \ref{fig:encodingphysicallayout}. +In general instructions are variable length depending on the number of arguments and their width. The first byte of an instruction is the \textit{opcode} which tells the machine what operation is to be performed. If one or more arguments are required, then the next byte is the \textit{options} byte which describes the type and width of the argument(s). The exact meaning of all the bits in the options byte are shown in Figure \ref{fig:encodingphysicallayout}. \section{Instruction Layout} -The logical ordering of the arguments follows the AT\&T syntax, meaning the left hand argument is the \textit{source} and the right hand argument is the \textit{destination}. Of course, the way the instructions are laid out in memory is reversed since we're a \textit{little endian} machine. Figure \ref{fig:encodingphysicallayout} shows how an instruction would be laid out. The operands can be of varying sizes based on the low nibble of the \textit{Options} byte and, depending on the instruction, all but the \textit{Opcode} byte may be present. +The logical ordering of the arguments follows the AT\&T syntax, meaning the left hand argument is the source and the right hand argument is the destination. This means to move the literal integer of, say 40, into the \textit{r1} register one would write this instruction as follows: +\begin{verbatim} + mov 40, r1 +\end{verbatim} +This is in contrast with how the data is laid out physically in memory, following the conventions described in section \ref{sec:conventions}~\nameref{sec:conventions}. Figure \ref{fig:encodingphysicallayout} shows how an instruction would be laid out. The operands can be of varying sizes based on the low nibble of the Options byte and, depending on the instruction, all but the Opcode byte may be present. %Because this machine is little endian, the opcode byte is physically located on the right hand-side of a word. % Placement info here: https://en.wikibooks.org/wiki/LaTeX/Floats,_Figures_and_Captions#Figures % Paths: https://tikz.dev/tikz-paths -\begin{figure}[ht] +\begin{figure}[h] \begin{tikzpicture} %\draw[help lines] (-8,-5) grid (8,5); - \node [draw, fit={( -7.5, 0.0) ( -13.5, 1.0)}, inner sep=0, label=center:Destination] (argtwo) {}; - \node [draw, fit={( -2.5, 0.0) ( - 7.5, 1.0)}, inner sep=0, label=center:Source] (argone) {}; - \node [draw, fit={( 0.0, 0.0) ( - 2.5, 1.0)}, inner sep=0, label=center:Options] (options) {}; - \node [draw, fit={( 0.0, 0.0) ( 2.5, 1.0)}, inner sep=0, label=center:Opcode] (opcode) {}; + \node [draw, fit={( -7.5, 0.0) ( -13.0, 1.0)}, inner sep=0, label=center:Destination] (argtwo) {}; + \node [draw, fit={( -2.5, 0.0) ( - 7.0, 1.0)}, inner sep=0, label=center:Source] (argone) {}; + \node [draw, fit={( 0.0, 0.0) ( - 2.0, 1.0)}, inner sep=0, label=center:Options] (options) {}; + \node [draw, fit={( 0.0, 0.0) ( 2.0, 1.0)}, inner sep=0, label=center:Opcode] (opcode) {}; \node at (argtwo.north)[above] {(if required)}; - \node at (argtwo.north west)[above] (highestbit) {31}; + \node at (argtwo.north west)[above] {31}; \node at (argone.north)[above] {(if required)}; \node at (argone.north west)[above] {24 23}; \node at (options.north west)[above] {16 15}; \node at (opcode.north west)[above] {8 7}; \node at (options.south)[below] {(if required)}; - \node at (opcode.north east)[above] (lowestbit) {0}; + \node at (opcode.north east)[above] {0}; % Use the calc library to calculate the center of two points. % Reference: https://tex.stackexchange.com/a/71479 %\node at ($(highestbit.north)!0.5!(lowestbit.north)$)[above] {Physical Layout}; @@ -114,28 +118,6 @@ The logical ordering of the arguments follows the AT\&T syntax, meaning the left \label{fig:encodingphysicallayout} % https://www.overleaf.com/learn/latex/Referencing_Figures \end{figure} -\begin{figure} - \begin{tabularx}{\textwidth}{ | c | c | X | } - \hline - Type & Pattern & Description \\ - \hline - Register & 00 & Operand is a register \\ - {[Register]} & 01 & Operand is a 32-bit address stored in a register \\ - Immediate & 10 & Operand is an 8-, 16- or 32-bit value \\ - {[Immediate]} & 11 & Operand is treated as a 32-bit address \\ - \hline - \multicolumn{3}{ | X | }{Source Operand Width Patterns} \\ - \hline - Invalid & 00 & Source must have a width \\ - 8-bit & 01 & 8-bit wide source \\ - 16-bit & 10 & 16-bit wide source \\ - 32-bit & 11 & 32-bit wide source \\ - \hline - \end{tabularx} - \caption{Operand Type and Width Bit Patterns} - \label{fig:ModeSettingEncodingFigure} % https://www.overleaf.com/learn/latex/Referencing_Figures -\end{figure} -\clearpage \section{Instructions} The /r represents a byte that specifies a register. /immX is for the immediate data type, where \textit{X} defines the width, which are 8, 16, or 32 bits. An address is defined as /addrX with the \textit{X} denoting the size of the data that will be written which can be 8, 16 or 32 bits, with the address itself always being 32-bits wide. \subsection{Add} diff --git a/document.tex b/document.tex index 5ca8a28..a530634 100644 --- a/document.tex +++ b/document.tex @@ -1,13 +1,8 @@ \documentclass[a4paper,12pt]{book} \usepackage[dvipsnames]{xcolor} \usepackage{tabularx} -\usepackage{multirow} -\usepackage{xintbinhex} -\usepackage[linkcolor=Aquamarine, linktoc=all, colorlinks=true]{hyperref} -\usepackage{environ} +\usepackage[linkcolor=Aquamarine, linktoc=all, colorlinks=true]{hyperref} % https://tex.stackexchange.com/questions/13622/chapter-ref-with-latex \usepackage{tikz} -\usetikzlibrary{positioning} -\usetikzlibrary{decorations.pathreplacing} \usetikzlibrary{fit} \usetikzlibrary{calc} @@ -31,4 +26,7 @@ \include{chapter 2} \include{chapter 3} -\end{document} \ No newline at end of file +\end{document} + +% Note: For any language listing this might be useful: +% https://www.overleaf.com/learn/latex/Code_listing \ No newline at end of file