 glm94
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5f437b6869
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Both the assembler and the disassembler should now support all the instructions I've layed out thus far.
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2022-08-29 18:51:48 +00:00 |
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glm94
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0d3f8a460e
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Added more instructions for the parser to emit and refactored the code in doing so.
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2022-08-28 15:37:56 -05:00 |
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glm94
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0785f21805
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Added a disassembler which is still very buggy. Also fixed some bugs with the opcode mask getting function.
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2022-08-26 21:41:02 +00:00 |
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glm94
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eb5e2c506e
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Got the start of encoding opcodes.
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2022-08-26 18:27:41 +00:00 |
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glm94
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0d060248cb
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Forgot about the bloody IN instruction...
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2022-08-25 21:01:35 -05:00 |
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glm94
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80bea6f1a8
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I'm dumb, fixed the CMP opcode overlap..
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2022-08-25 20:57:33 -05:00 |
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glm94
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a96f485da6
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I believe I have the bit patterns for my opcodes worked out.
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2022-08-25 20:45:46 -05:00 |
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glm94
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88d550f344
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Added unconditional jump opcode to my comment section.
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2022-08-25 20:27:25 -05:00 |
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glm94
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0e53f9798f
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Added a distinction between constant numbers and what are effectively memory addresses (i.e. strings and labels).
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2022-08-25 19:47:16 -05:00 |
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glm94
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72525959f6
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Reworked the tokens to include a broad class to make parameter matching a bit easier, and removed the hexadecimal distinction.
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2022-05-12 20:26:14 +00:00 |
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glm94
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72abf6c4ab
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Started work on rewriting the Parser.
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2022-05-10 21:03:09 +00:00 |
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glm94
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1fd5c3af57
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Fixed a bug with the opcode and register types not being set correctly.
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2022-02-22 21:09:04 -06:00 |
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glm94
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19021ff782
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Modified how registers and opcodes are represented. This commit is a bit buggy but doesn't crash and burn at least. I just wanted the new structs push out before making a bigger mess of things as I try to organize this all.
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2022-02-17 21:35:57 -06:00 |
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glm94
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3d4ab57f05
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Created the skeleton for the parser.
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2022-02-07 15:33:58 +00:00 |
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glm94
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f88613a160
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Expanded the tokenizer to recognize some opcodes and registers.
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2022-01-24 17:09:02 +00:00 |
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