diff --git a/docs/document.tex b/docs/document.tex
index 8a0a859..73bec7a 100644
--- a/docs/document.tex
+++ b/docs/document.tex
@@ -1,15 +1,25 @@
-\documentclass{book}
+\documentclass[a4paper,12pt]{book}
 \usepackage{tikz}
 
 \title{Unnamed Machine}
 \author{A Very Terrible 16-bit Machine}
 
+\newcommand{\OpcodeTable}[4] {
+	\begin{tabular}{ c c c c }
+		\hline
+		Opcode & Mnemonic & Operand 1 & Operand 2 \\
+		\hline\hline
+		#1 & #2 & #3 & #4 \\
+		\hline
+	\end{tabular}
+}
+
 \begin{document}
 	\maketitle
 	\tableofcontents
 	\chapter{Overview}
 	\section{Introduction}
-	This is a very poorly thought out 16-bit machine, but you've got to start somewhere. Currently debating between a CPU status register, 80x86 style, or just placing arithmetic results into a predetermined register. This is more of a load–store architecture to try and keep the instruction set simple.
+	This is a very poorly thought out 16-bit machine, but you've got to start somewhere. Currently debating between a CPU status register, 80x86 style, or just placing arithmetic results into a predetermined register. This is more of a load–store architecture to try and keep the instruction set simple. The machine will be big-endian.
 	\section{Registers}
 	The following are the general purpose registers that can be used.
 	\begin{itemize}
@@ -39,7 +49,7 @@
 	\chapter{Instruction Set Architecture}
 	\section{Instruction Encoding}
 	Instructions are fixed to exactly one byte (8 bits).
-	Instructions that work with two operands the register for operand one will be encoded in the three least significant bits. So an instruction with format XXXX X000 will use Register 1 and so forth all the way to the pattern XXXX X111, which will be Register 8.
+	Instructions that work with two operands the register for operand one will be encoded in the three least significant bits. So an instruction with format XXXX X000 will use Register 1 and so forth all the way to XXXX X111, which will be Register 8.
 	\begin{figure}
 		\centering
 		\begin{tabular}{ c c }
@@ -52,87 +62,41 @@
 		\caption{Encoding Layout}
 	\end{figure}
 	\section{STOB (Store Byte)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x20 & stob & Register & Memory Address \\
-		\hline
-	\end{tabular}\\[6pt]
-	Stores a single byte (the lower nibble) from a register to a memory address.
+		\OpcodeTable{0x20}{stob}{Register}{Address}\\[6pt]
+		Stores a single byte (the lower nibble) from a register to a memory address.
 	\section{STOW (Store Machine Word)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x20 & stow & Register & Memory Address \\
-		\hline
-	\end{tabular}\\[6pt]
-	Stores a machine word from a register to a memory address.
+		\OpcodeTable{0x20}{stow}{Register}{Address}\\[6pt]
+		Stores a machine word from a register to a memory address.
 	\section{LODB (Load Byte)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x20 & lodb & Register & Address \\
-		\hline
-	\end{tabular}\\[6pt]
-	Loads a single byte into a register from a memory address.
+		\OpcodeTable{0x20}{lodb}{Register}{Address}\\[6pt]
+		Loads a single byte into a register from a memory address, zeroing out the high nibble.
 	\section{LODW (Load Machine Word)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x20 & lodw & Register & Address \\
-		\hline
-	\end{tabular}\\[6pt]
-	Loads a word into a register from a memory address.
+		\OpcodeTable{0x20}{lodw}{Register}{Address}\\[6pt]
+		Loads a word into a register from a memory address.
+	\section{LABR (Load Byte from Address)}
+		\OpcodeTable{0x20}{stow}{Register}{None}\\[6pt]
+		Loads a single byte, zeroing out the high nibble, with the address found in the register.
+	\section{LAWR (Load Word from Address)}
+		\OpcodeTable{0x20}{lawr}{Register}{None}\\[6pt]
+		Loads a machine word with the address found in the register.
 	\section{CMP (Compare)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x80 & cmp & Register & Register \\
-		\hline
-	\end{tabular}\\[6pt]
-	Compares two registers and somewhere sets a result, maybe in register 1?
+		\OpcodeTable{0x20}{cmp}{Register}{Register}\\[6pt]
+		Compares two registers and somewhere sets a result, maybe in register 1?
 	\section{ADD (Add)}
-		\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x40 & add & Register & Register \\
-		\hline
-	\end{tabular}\\[6pt]
-	Performs addition on a register with a value from another (or the same) register.
+		\OpcodeTable{0x20}{add}{Register}{Register}\\[6pt]
+		Performs addition on a register with a value from another (or the same) register.
 	\section{SUB (Subtract)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x60 & sub & Register & Register \\
-		\hline
-	\end{tabular}\\[6pt]
-	Performs subtraction on a register with a value from another (or the same) register.
+		\OpcodeTable{0x20}{sub}{Register}{Register}\\[6pt]
+		Performs subtraction on a register with a value from another (or the same) register.
 	\section{JMP (Jump)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x60 & jmp & Address & None \\
-		\hline
-	\end{tabular}
-	Jumps unconditionally to a memory address.
+		\OpcodeTable{0x20}{jmp}{Address}{None}\\[6pt]
+		Jumps unconditionally to a memory address.
 	\section{JZ (Jump if Zero)}
-	\begin{tabular}{ c c c c }
-		\hline
-		Opcode & Mnemonic & Operand 1 & Operand 2 \\
-		\hline\hline
-		0x60 & jz & Address & None \\
-		\hline
-	\end{tabular}
-	Jumps to a memory address if some register is zero.
+		\OpcodeTable{0x20}{jz}{Register}{None}\\[6pt]
+		Jumps to a memory address if some register is zero.
 	\section{JG (Jump if Greater Than)}
+		\OpcodeTable{0x70}{jg}{Address}{None}\\[6pt]
+		Jump to the Address if some register is greater than zero.
 	\section{JL (Jump if Less Than)}
 	\section{AND (Logical AND)}
 	\section{XOR (Logical Exclusive OR)}
@@ -140,5 +104,7 @@
 	\section{NOT (Logical Negation)}
 	\section{SHR (Shift Right)}
 	\section{SHL (Shift Left)}
+	\section{INC (Increment)}
+	\section{DEC (Decrement)}
 	
 \end{document}