diff --git a/docs/document.tex b/docs/document.tex
index 914c3d1..53e1a00 100644
--- a/docs/document.tex
+++ b/docs/document.tex
@@ -1,5 +1,9 @@
 \documentclass[a4paper,12pt]{book}
 \usepackage{tikz}
+\usepackage{hyperref}
+\hypersetup{
+	linktoc=all
+}
 
 \title{Unnamed Machine}
 \author{A Very Terrible 16-bit Machine}
@@ -27,6 +31,7 @@
 		\item[] ...
 		\item[] R8
 	\end{itemize}
+	Additionally, there will be a special status register that will be a signed 16 bit register that the compare and jump instructions will read or write to when determining what action, if any, they'll take.
 	\section{Memory Model}
 	Memory will be implicitly mapped I/O. The bottom 3201 bytes of memory will be reserved for the keyboard input and graphics.
 	A single byte is reserved for the keyboard's input. The current key will be stored in byte 0xF37E, with the most significant bit being a flag indicating that the keyboard 
@@ -50,7 +55,8 @@
 	\section{Instruction Encoding}
 	Instructions are fixed to exactly one byte (8 bits).
 	Instructions that work with two operands the register for operand one will be encoded in the three least significant bits. So an instruction with format XXXX X000 will use Register 1 and so forth all the way to XXXX X111, which will be Register 8.
-	\begin{figure}
+	%https://tex.stackexchange.com/questions/32598/force-latex-image-to-appear-in-the-section-in-which-its-declared
+	\begin{figure}[!htb]
 		\centering
 		\begin{tabular}{ c c }
 			\hline
@@ -86,10 +92,10 @@
 		Loads an immediate machine word into the register clearing the high nibble if the value is less then 256.
 	\section{CMP (Compare)}
 		\OpcodeTable{0x20}{cmp}{Register}{Register}\\[6pt]
-		Compares two registers and somewhere sets a result, maybe in register 1?
+		Compares two registers and somewhere sets a result in the status register.
 	\section{CMPI (Compare Immediate)}
 		\OpcodeTable{0x00}{cmpi}{Register}{Constant}\\[6pt]
-		Compares an immediate 2 byte value to the contents of a register setting a result.
+		Compares an immediate 2 byte value to the contents of a register setting the status register accordingly.
 	\section{ADD (Add)}
 		\OpcodeTable{0x20}{add}{Register}{Register}\\[6pt]
 		Performs addition on a register with a value from another (or the same) register.
@@ -101,20 +107,38 @@
 		Jumps unconditionally to a memory address.
 	\section{JZ (Jump if Zero)}
 		\OpcodeTable{0x20}{jz}{Register}{None}\\[6pt]
-		Jumps to a memory address if some register is zero.
+		Jumps to a memory address if the status flag is zero.
 	\section{JG (Jump if Greater Than)}
 		\OpcodeTable{0x70}{jg}{Address}{None}\\[6pt]
-		Jump to the Address if some register is greater than zero.
+		Jump to the Address if the status flag is greater than zero.
 	\section{JL (Jump if Less Than)}
+		\OpcodeTable{0x00}{jl}{Address}{None}\\[6pt]
+		Jumps to the address if the status flag is less than zero.
 	\section{AND (Logical AND)}
+		\OpcodeTable{0x00}{and}{Register}{Register}\\[6pt]
+		Logical ANDs the two registers together storing the result in operand 1.
 	\section{XOR (Logical Exclusive OR)}
+		\OpcodeTable{0x00}{xor}{Register}{Register}\\[6pt]
+		Logical XORs the two registers together storing the result in operand 1.
 	\section{OR (Logical OR)}
+		\OpcodeTable{0x00}{or}{Register}{Register}\\[6pt]
+		Logical ORs the two registers together storing the result in operand 1.
 	\section{NOT (Logical Negation)}
+		\OpcodeTable{0x00}{not}{Register}{None}\\[6pt]
+		Inverts the bits of the target register.
 	\section{SHR (Shift Right)}
+		\OpcodeTable{0x00}{shr}{Register}{Constant}\\[6pt]
+		Bit-wise shifts the contents of the register right Constant number of times.
 	\section{SHL (Shift Left)}
+		\OpcodeTable{0x00}{shl}{Register}{Constant}\\[6pt]
+		Bit-wise shifts the contents of the register left Constant number of times.
 	\section{INC (Increment)}
-		\OpcodeTable{0x00}{inc}{Register}{None}
+		\OpcodeTable{0x00}{inc}{Register}{None}\\[6pt]
+		Increments the contents of the register by one. Over-flows will not be reported.
 	\section{DEC (Decrement)}
-		\OpcodeTable{0x00}{dec}{Register}{None}
-	
+		\OpcodeTable{0x00}{dec}{Register}{None}\\[6pt]
+		Decrements the contents of the register by one. Under-flows will not be reported.
+	\section{NOP (No Operation)}
+		\OpcodeTable{0x00}{nop}{None}{None}\\[6pt]
+		Skips a clock cycle, incrementing the program counter by one.
 \end{document}